The invention relates to a method of manufacturing a field effect transistor in a layer of gallium arsenide of the n-type on a semi-insulating substrate of gallium arsenide. The invention further relates to field effect transistors obtained by the use of this method.
Such a method is known from the French patent application published under No. 2,496,982 on June 25, 1982.
The invention relates to the manufacture of integrated circuits, more particularly in gallium arsenide. The essential standard element of these circuits is the field effect transistor, the gate electrode of which frequently is a metallic electrode in contact with a semiconductor layer forming a so-called Schottky junction.
Micro-electronics having for its object to reduce the volume and weight for applications in which such a reduction is fundamental, i.e. in the field of aerospace, this reduction necessarily results in a gradually advancing integration of the circuits. However, anomalies in the performance of the transistors limit the efficiency of manufacture of these circuits and counteract the improvement of the integration level.
Among these anomalies there are two particular ones, which seem to be the least understandable and the most disturbing ones. These are the phenomena of control by the substrate (so-called "back-gating") and anomalies of the drain-source characteristics I.sub.DS -V.sub.DS (so-called "bumping").
The first phenomenon consists in the possibility of controlling the channel of a field effect transistor (FET) from an electrode adjacent to, but foreign to the transistor, which electrode is subjected to a negatvie potential with respect to the source of this transistor. This type of anomaly is known in field-effect transistors obtained by epitaxy and a solution for this problem consists in that a weakly conducting buffer layer is provided which separates the channel of the transistor from the semi-insulating substrate. This solution is not transposable here because the technology used for the manufacture of the transistors consists in direct ion implantation(s) in a semi-insulating GaAs substrate.
The second phenomenon consists in an abrupt increase of the drain current starting at a certain "threshold voltage" between drain and source. The reason for this phenomenon seems to be closely associated with the phenomenon of control by the substrate because the two pheonomena occur concomitently in the same field effect transistor.